1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same and, more particularly, to a semiconductor device having a microelectrode and a method of manufacturing the same.
2. Description of the Prior Art
Conventionally, in a process of forming the gate electrode of a GaAs FET (Field Effect Transistor), a technique of forming a gate electrode having a T-shaped section by filling an oxide film opening pattern with a metal film is used to reduce the gate length while lowering the gate resistance and the capacitance between the gate substrates.
The structure of the conventional semiconductor device in which the gate electrode is formed by burying an electrode, and the steps of the conventional manufacturing method will be described below.
FIGS. 1E and 2 show an example of the gate electrode structure of the conventional semiconductor device.
A Schottky metal film 76, a barrier metal film 77, and a low-resistance metal film 78 are sequentially formed from the lower side in a pattern opening portion having a width of 0.2 .mu.m. The Schottky metal film 6 is 100 nm thick, and the barrier metal film 77 is 2,000 nm thick on the flat portion except the pattern opening portion. On the bottom portion in the pattern opening portion, however, the Schottky metal film 76 is only 10 nm thick, and the barrier metal film 77 is only 20 nm thick.
The low-resistance metal film 78 extends into a gate vertical portion 82, so the distance to the Schottky interface between the Schottky metal film 76 and a substrate operation layer 72 is about 30 nm. This is because the metal film thickness decreases in the small pattern opening portion.
FIGS. 1A to 1E are sectional views showing the steps in the manufacture of the gate electrode of the conventional semiconductor device.
The gate oxide film 72 is formed on a semi-insulating substrate 71, and then, a first insulating film 73 is formed. A resist film 74 is applied onto the first insulating film 73 and subjected to exposure and development to form a pattern opening portion 80 (FIG. 1A).
The first insulating film 73 is selectively removed by anisotropic dry etching using the opening pattern of the resist film 74 as a mask, thereby forming a gate opening pattern. After this, the resist film 74 is removed (FIG. 1B).
A second insulating film 75 is formed on the entire surface of the first insulating film 73. Since the second insulating film 75 also forms on the side wall of the opening portion, the size of the opening portion is reduced (FIG. 1C).
The entire surface is etched back by dry etching to expose the gate oxide film 72, thereby forming the gate opening pattern (FIG. 1D).
The Schottky metal film 76, the barrier metal film 77, and the low-resistance metal film 78 are sequentially formed on the entire surface. The metal films 76, 77, and 78 are selectively removed by ion milling and dry etching using, as a mask, a resist pattern formed on the pattern opening portion, thereby obtaining a T-shaped gate electrode 81 (FIGS. 1E and 2). FIG. 1E is an enlarged view of a section taken along a line IE--IE in FIG. 2.
In the conventional method, the barrier metal film having a sufficient thickness must be inserted between the Schottky metal film and the low-resistance metal film. However, since the barrier metal film cannot obtain a sufficient thickness in the pattern opening portion, the metal of the low-resistance metal film diffuses into the substrate through the Schottky interface. This degrades the Schottky characteristics, resulting in the problem of low reliability of the FET.
The reason for this is as follows. The thickness of the barrier metal film formed by sputtering or the like becomes smaller on the bottom portion in the gate opening portion having a trench structure than that on the flat portion other than the pattern opening portion because of the shielding effect from the metal film which has already been formed.